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Searched refs:num_fclk_levels (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
Ddcn401_clk_mgr.c90 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_fclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
390 int dramclk_khz_override, fclk_khz_override, num_fclk_levels; in dcn401_auto_dpm_test_log() local
417 num_fclk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_fclk_levels - 1; in dcn401_auto_dpm_test_log()
423 fclk_khz_override = clk_mgr->base.bw_params->clk_table.entries[num_fclk_levels].fclk_mhz * 1000; in dcn401_auto_dpm_test_log()
999 …table.entries[clk_mgr_base->bw_params->clk_table.num_entries_per_clk.num_fclk_levels - 1].fclk_mhz; in dcn401_build_update_bandwidth_clocks_sequence()
1535 &num_entries_per_clk->num_fclk_levels); in dcn401_get_memclk_states_from_smu()
1537 if (num_entries_per_clk->num_fclk_levels && clk_mgr_base->bw_params->dc_mode_limit.fclk_mhz == in dcn401_get_memclk_states_from_smu()
1538 clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_fclk_levels - 1].fclk_mhz) in dcn401_get_memclk_states_from_smu()
1541 if (num_entries_per_clk->num_memclk_levels >= num_entries_per_clk->num_fclk_levels) { in dcn401_get_memclk_states_from_smu()
1544 num_levels = num_entries_per_clk->num_fclk_levels; in dcn401_get_memclk_states_from_smu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
Ddcn32_clk_mgr.c512 int dramclk_khz_override, fclk_khz_override, num_fclk_levels; in dcn32_auto_dpm_test_log() local
541 num_fclk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_fclk_levels - 1; in dcn32_auto_dpm_test_log()
547 … fclk_khz_override = clk_mgr->base.bw_params->clk_table.entries[num_fclk_levels].fclk_mhz * 1000; in dcn32_auto_dpm_test_log()
1047 &num_entries_per_clk->num_fclk_levels); in dcn32_get_memclk_states_from_smu()
1050 if (num_entries_per_clk->num_memclk_levels >= num_entries_per_clk->num_fclk_levels) { in dcn32_get_memclk_states_from_smu()
1053 num_levels = num_entries_per_clk->num_fclk_levels; in dcn32_get_memclk_states_from_smu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn401/
Ddcn401_fpu.c181 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn401_update_bw_bounding_box_fpu()
182 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; in dcn401_update_bw_bounding_box_fpu()
205 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; i++) { in dcn401_update_bw_bounding_box_fpu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn321/
Ddcn321_fpu.c404 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = num_fclk_dpms; in build_synthetic_soc_states()
872 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn321_update_bw_bounding_box_fpu()
873 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; in dcn321_update_bw_bounding_box_fpu()
897 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; i++) { in dcn321_update_bw_bounding_box_fpu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/
Ddml2_wrapper.h166 unsigned int num_fclk_levels; member
Ddml2_translation_helper.c527 for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels; i++) { in dml2_init_soc_states()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h120 unsigned int num_fclk_levels; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn35/
Ddcn35_fpu.c374 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn35_update_bw_bounding_box_fpu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn351/
Ddcn351_fpu.c408 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn351_update_bw_bounding_box_fpu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/
Ddml21_translation_helper.c130 if (dc_clk_table->num_entries_per_clk.num_fclk_levels) { in dml21_apply_soc_bb_overrides()
131 dml_clk_table->fclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_fclk_levels; in dml21_apply_soc_bb_overrides()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddcn32_fpu.c2856 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = num_fclk_dpms; in build_synthetic_soc_states()
3317 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn32_update_bw_bounding_box_fpu()
3318 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; in dcn32_update_bw_bounding_box_fpu()
3341 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; i++) { in dcn32_update_bw_bounding_box_fpu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
Ddcn35_clk_mgr.c903 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = clock_table->NumFclkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
Ddcn401_hwseq.c234 …(dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels && dc->clk_mgr->bw_params->… in dcn401_init_hw()