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Searched refs:num_entries_per_clk (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn401/
Ddcn401_fpu.c178 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels = in dcn401_update_bw_bounding_box_fpu()
179 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dcfclk_levels; in dcn401_update_bw_bounding_box_fpu()
181 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn401_update_bw_bounding_box_fpu()
182 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; in dcn401_update_bw_bounding_box_fpu()
184 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn401_update_bw_bounding_box_fpu()
185 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; in dcn401_update_bw_bounding_box_fpu()
187 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_socclk_levels = in dcn401_update_bw_bounding_box_fpu()
188 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_socclk_levels; in dcn401_update_bw_bounding_box_fpu()
190 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dtbclk_levels = in dcn401_update_bw_bounding_box_fpu()
191 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dtbclk_levels; in dcn401_update_bw_bounding_box_fpu()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
Ddcn401_clk_mgr.c82 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_socclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
86 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_memclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
90 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_fclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
94 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dispclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
98 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dppclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
105 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dcfclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
109 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dtbclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
212 struct clk_limit_num_entries *num_entries_per_clk; in dcn401_init_clocks() local
218 num_entries_per_clk = &clk_mgr_base->bw_params->clk_table.num_entries_per_clk; in dcn401_init_clocks()
239 &num_entries_per_clk->num_dcfclk_levels); in dcn401_init_clocks()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
Ddcn32_clk_mgr.c166 struct clk_limit_num_entries *num_entries_per_clk; in dcn32_init_clocks() local
172 num_entries_per_clk = &clk_mgr_base->bw_params->clk_table.num_entries_per_clk; in dcn32_init_clocks()
193 &num_entries_per_clk->num_dcfclk_levels); in dcn32_init_clocks()
199 &num_entries_per_clk->num_socclk_levels); in dcn32_init_clocks()
206 &num_entries_per_clk->num_dtbclk_levels); in dcn32_init_clocks()
214 &num_entries_per_clk->num_dispclk_levels); in dcn32_init_clocks()
215 num_levels = num_entries_per_clk->num_dispclk_levels; in dcn32_init_clocks()
224 &num_entries_per_clk->num_dppclk_levels); in dcn32_init_clocks()
225 num_levels = num_entries_per_clk->num_dppclk_levels; in dcn32_init_clocks()
231 if (num_entries_per_clk->num_dcfclk_levels && in dcn32_init_clocks()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn321/
Ddcn321_fpu.c403 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = num_uclk_dpms; in build_synthetic_soc_states()
404 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = num_fclk_dpms; in build_synthetic_soc_states()
869 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels = in dcn321_update_bw_bounding_box_fpu()
870 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dcfclk_levels; in dcn321_update_bw_bounding_box_fpu()
872 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn321_update_bw_bounding_box_fpu()
873 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; in dcn321_update_bw_bounding_box_fpu()
875 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn321_update_bw_bounding_box_fpu()
876 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; in dcn321_update_bw_bounding_box_fpu()
878 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_socclk_levels = in dcn321_update_bw_bounding_box_fpu()
879 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_socclk_levels; in dcn321_update_bw_bounding_box_fpu()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn35/
Ddcn35_fpu.c372 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels = in dcn35_update_bw_bounding_box_fpu()
374 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn35_update_bw_bounding_box_fpu()
376 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dispclk_levels = in dcn35_update_bw_bounding_box_fpu()
378 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn35_update_bw_bounding_box_fpu()
380 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_socclk_levels = in dcn35_update_bw_bounding_box_fpu()
382 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn35_update_bw_bounding_box_fpu()
384 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dtbclk_levels = in dcn35_update_bw_bounding_box_fpu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn351/
Ddcn351_fpu.c406 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels = in dcn351_update_bw_bounding_box_fpu()
408 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn351_update_bw_bounding_box_fpu()
410 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dispclk_levels = in dcn351_update_bw_bounding_box_fpu()
412 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn351_update_bw_bounding_box_fpu()
414 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_socclk_levels = in dcn351_update_bw_bounding_box_fpu()
416 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn351_update_bw_bounding_box_fpu()
418 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dtbclk_levels = in dcn351_update_bw_bounding_box_fpu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/
Ddml21_translation_helper.c107 if (dc_clk_table->num_entries_per_clk.num_dcfclk_levels) { in dml21_apply_soc_bb_overrides()
108 dml_clk_table->dcfclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_dcfclk_levels; in dml21_apply_soc_bb_overrides()
130 if (dc_clk_table->num_entries_per_clk.num_fclk_levels) { in dml21_apply_soc_bb_overrides()
131 dml_clk_table->fclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_fclk_levels; in dml21_apply_soc_bb_overrides()
153 if (dc_clk_table->num_entries_per_clk.num_memclk_levels) { in dml21_apply_soc_bb_overrides()
154 dml_clk_table->uclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_memclk_levels; in dml21_apply_soc_bb_overrides()
176 if (dc_clk_table->num_entries_per_clk.num_dispclk_levels) { in dml21_apply_soc_bb_overrides()
177 dml_clk_table->dispclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_dispclk_levels; in dml21_apply_soc_bb_overrides()
199 if (dc_clk_table->num_entries_per_clk.num_dppclk_levels) { in dml21_apply_soc_bb_overrides()
200 dml_clk_table->dppclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_dppclk_levels; in dml21_apply_soc_bb_overrides()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddcn32_fpu.c2511 …int min_dram_speed_mts_offset = dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_l… in dcn32_calculate_wm_and_dlg_fpu()
2855 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = num_uclk_dpms; in build_synthetic_soc_states()
2856 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = num_fclk_dpms; in build_synthetic_soc_states()
3314 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels = in dcn32_update_bw_bounding_box_fpu()
3315 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dcfclk_levels; in dcn32_update_bw_bounding_box_fpu()
3317 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn32_update_bw_bounding_box_fpu()
3318 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; in dcn32_update_bw_bounding_box_fpu()
3320 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn32_update_bw_bounding_box_fpu()
3321 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; in dcn32_update_bw_bounding_box_fpu()
3323 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_socclk_levels = in dcn32_update_bw_bounding_box_fpu()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
Ddcn35_clk_mgr.c900 bw_params->clk_table.num_entries_per_clk.num_dcfclk_levels = clock_table->NumDcfClkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
901 bw_params->clk_table.num_entries_per_clk.num_dispclk_levels = clock_table->NumDispClkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
902 bw_params->clk_table.num_entries_per_clk.num_dppclk_levels = clock_table->NumDispClkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
903 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = clock_table->NumFclkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
904 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = clock_table->NumMemPstatesEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
905 bw_params->clk_table.num_entries_per_clk.num_socclk_levels = clock_table->NumSocClkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/
Ddml2_wrapper.h176 struct dml2_clks_num_entries num_entries_per_clk; member
Ddml2_translation_helper.c519 …for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels; i++)… in dml2_init_soc_states()
527 for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels; i++) { in dml2_init_soc_states()
532 …for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels; i++)… in dml2_init_soc_states()
537 …for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_socclk_levels; i++)… in dml2_init_soc_states()
542 …for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_dtbclk_levels; i++)… in dml2_init_soc_states()
548 …for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_dispclk_levels; i++… in dml2_init_soc_states()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h133 struct clk_limit_num_entries num_entries_per_clk; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
Ddcn401_hwseq.c231 …(dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dcfclk_levels && dc->clk_mgr->bw_params… in dcn401_init_hw()
232 …(dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dispclk_levels && dc->clk_mgr->bw_param… in dcn401_init_hw()
233 …(dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dtbclk_levels && dc->clk_mgr->bw_params… in dcn401_init_hw()
234 …(dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels && dc->clk_mgr->bw_params->… in dcn401_init_hw()
235 …(dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels && dc->clk_mgr->bw_params… in dcn401_init_hw()
236 …(dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_socclk_levels && dc->clk_mgr->bw_params… in dcn401_init_hw()