Searched refs:num_dppclk_levels (Results 1 – 11 of 11) sorted by relevance
196 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn401_update_bw_bounding_box_fpu()197 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dppclk_levels; in dcn401_update_bw_bounding_box_fpu()
171 unsigned int num_dppclk_levels; member
125 unsigned int num_dppclk_levels; member
887 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn321_update_bw_bounding_box_fpu()888 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dppclk_levels; in dcn321_update_bw_bounding_box_fpu()
224 &num_entries_per_clk->num_dppclk_levels); in dcn32_init_clocks()225 num_levels = num_entries_per_clk->num_dppclk_levels; in dcn32_init_clocks()
98 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dppclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()277 &num_entries_per_clk->num_dppclk_levels); in dcn401_init_clocks()293 for (i = 0; i < num_entries_per_clk->num_dppclk_levels; i++) in dcn401_init_clocks()
378 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn35_update_bw_bounding_box_fpu()
412 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn351_update_bw_bounding_box_fpu()
199 if (dc_clk_table->num_entries_per_clk.num_dppclk_levels) { in dml21_apply_soc_bb_overrides()200 dml_clk_table->dppclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_dppclk_levels; in dml21_apply_soc_bb_overrides()
902 bw_params->clk_table.num_entries_per_clk.num_dppclk_levels = clock_table->NumDispClkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
3332 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn32_update_bw_bounding_box_fpu()3333 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dppclk_levels; in dcn32_update_bw_bounding_box_fpu()