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Searched refs:mv88e6xxx_g1_write (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/net/dsa/mv88e6xxx/
Dglobal1.c23 int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val) in mv88e6xxx_g1_write() function
91 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val); in mv88e6250_g1_eeprom_reload()
177 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_01, reg); in mv88e6xxx_g1_set_switch_mac()
182 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_23, reg); in mv88e6xxx_g1_set_switch_mac()
187 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_45, reg); in mv88e6xxx_g1_set_switch_mac()
211 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val); in mv88e6185_g1_reset()
234 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val); in mv88e6250_g1_reset()
263 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val); in mv88e6185_g1_ppu_enable()
281 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val); in mv88e6185_g1_ppu_disable()
304 return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val); in mv88e6185_g1_set_max_frame_size()
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Dglobal1_atu.c22 return mv88e6xxx_g1_write(chip, MV88E6352_G1_ATU_FID, fid & 0xfff); in mv88e6xxx_g1_atu_fid_write()
41 return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val); in mv88e6xxx_g1_atu_set_learn2all()
68 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val); in mv88e6xxx_g1_atu_set_age_time()
107 return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val); in mv88e6165_g1_atu_set_hash()
123 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_OP, in mv88e6xxx_g1_read_atu_violation()
151 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, in mv88e6xxx_g1_atu_op()
164 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_OP, in mv88e6xxx_g1_atu_op()
245 return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_DATA, data); in mv88e6xxx_g1_atu_data_write()
279 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_MAC01 + i, val); in mv88e6xxx_g1_atu_mac_write()
Dglobal1_vtu.c43 return mv88e6xxx_g1_write(chip, MV88E6352_G1_VTU_FID, val); in mv88e6xxx_g1_vtu_fid_write()
66 return mv88e6xxx_g1_write(chip, MV88E6352_G1_VTU_SID, val); in mv88e6xxx_g1_vtu_sid_write()
82 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_OP, in mv88e6xxx_g1_vtu_op()
126 return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_VID, val); in mv88e6xxx_g1_vtu_vid_write()
200 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg); in mv88e6185_g1_vtu_data_write()
250 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg); in mv88e6390_g1_vtu_data_write()
Dglobal1.h274 int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val);
Dchip.c228 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, reg); in mv88e6xxx_g1_irq_bus_sync_unlock()
270 mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, mask); in mv88e6xxx_g1_irq_free_common()
317 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, mask); in mv88e6xxx_g1_irq_setup_common()
330 mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, mask); in mv88e6xxx_g1_irq_setup_common()