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Searched refs:mux_mode (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/arch/arm/mach-davinci/
Dmux.h663 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ argument
671 .mode = mux_mode, \
674 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
682 .mode = mux_mode, \
685 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
693 .mode = mux_mode, \
/linux-6.12.1/drivers/pinctrl/freescale/
Dpinctrl-imx.h30 unsigned int mux_mode; member
42 unsigned int mux_mode; member
Dpinctrl-scu.c150 pin_scu->mux_mode = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_scu()
155 pin_scu->mux_mode, pin_scu->config); in imx_pinctrl_parse_pin_scu()
Dpinctrl-imx.c187 reg |= (pin_mmio->mux_mode << info->mux_shift); in imx_pmx_set_one_pin_mmio()
192 writel(pin_mmio->mux_mode, ipctl->base + pin_reg->mux_reg); in imx_pmx_set_one_pin_mmio()
194 pin_reg->mux_reg, pin_mmio->mux_mode); in imx_pmx_set_one_pin_mmio()
491 pin_mmio->mux_mode = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
498 pin_mmio->mux_mode |= IOMUXC_CONFIG_SION; in imx_pinctrl_parse_pin_mmio()
504 pin_mmio->mux_mode, pin_mmio->config); in imx_pinctrl_parse_pin_mmio()
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx7ulp-pinctrl.txt17 <mux_conf_reg input_reg mux_mode input_val> are specified