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Searched refs:mm_boot_level_offset (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvegam_smumgr.c333 uint32_t mm_boot_level_offset, mm_boot_level_value; in vegam_update_uvd_smc_table() local
341 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU75_Discrete_DpmTable, in vegam_update_uvd_smc_table()
343 mm_boot_level_offset /= 4; in vegam_update_uvd_smc_table()
344 mm_boot_level_offset *= 4; in vegam_update_uvd_smc_table()
346 CGS_IND_REG__SMC, mm_boot_level_offset); in vegam_update_uvd_smc_table()
350 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in vegam_update_uvd_smc_table()
366 uint32_t mm_boot_level_offset, mm_boot_level_value; in vegam_update_vce_smc_table() local
377 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in vegam_update_vce_smc_table()
379 mm_boot_level_offset /= 4; in vegam_update_vce_smc_table()
380 mm_boot_level_offset *= 4; in vegam_update_vce_smc_table()
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Dfiji_smumgr.c2368 uint32_t mm_boot_level_offset, mm_boot_level_value; in fiji_update_uvd_smc_table() local
2376 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU73_Discrete_DpmTable, in fiji_update_uvd_smc_table()
2378 mm_boot_level_offset /= 4; in fiji_update_uvd_smc_table()
2379 mm_boot_level_offset *= 4; in fiji_update_uvd_smc_table()
2381 CGS_IND_REG__SMC, mm_boot_level_offset); in fiji_update_uvd_smc_table()
2385 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in fiji_update_uvd_smc_table()
2401 uint32_t mm_boot_level_offset, mm_boot_level_value; in fiji_update_vce_smc_table() local
2412 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in fiji_update_vce_smc_table()
2414 mm_boot_level_offset /= 4; in fiji_update_vce_smc_table()
2415 mm_boot_level_offset *= 4; in fiji_update_vce_smc_table()
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Dpolaris10_smumgr.c2284 uint32_t mm_boot_level_offset, mm_boot_level_value; in polaris10_update_uvd_smc_table() local
2292 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, in polaris10_update_uvd_smc_table()
2294 mm_boot_level_offset /= 4; in polaris10_update_uvd_smc_table()
2295 mm_boot_level_offset *= 4; in polaris10_update_uvd_smc_table()
2297 CGS_IND_REG__SMC, mm_boot_level_offset); in polaris10_update_uvd_smc_table()
2301 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in polaris10_update_uvd_smc_table()
2317 uint32_t mm_boot_level_offset, mm_boot_level_value; in polaris10_update_vce_smc_table() local
2328 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in polaris10_update_vce_smc_table()
2330 mm_boot_level_offset /= 4; in polaris10_update_vce_smc_table()
2331 mm_boot_level_offset *= 4; in polaris10_update_vce_smc_table()
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Dtonga_smumgr.c2679 uint32_t mm_boot_level_offset, mm_boot_level_value; in tonga_update_uvd_smc_table() local
2687 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in tonga_update_uvd_smc_table()
2689 mm_boot_level_offset /= 4; in tonga_update_uvd_smc_table()
2690 mm_boot_level_offset *= 4; in tonga_update_uvd_smc_table()
2692 CGS_IND_REG__SMC, mm_boot_level_offset); in tonga_update_uvd_smc_table()
2697 mm_boot_level_offset, mm_boot_level_value); in tonga_update_uvd_smc_table()
2714 uint32_t mm_boot_level_offset, mm_boot_level_value; in tonga_update_vce_smc_table() local
2722 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in tonga_update_vce_smc_table()
2724 mm_boot_level_offset /= 4; in tonga_update_vce_smc_table()
2725 mm_boot_level_offset *= 4; in tonga_update_vce_smc_table()
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