Home
last modified time | relevance | path

Searched refs:mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgmc_v6_0.c355 reg = mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vmid; in gmc_v6_0_emit_flush_gpu_tlb()
499 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, table_addr >> 12); in gmc_v6_0_gart_enable()
522 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i, in gmc_v6_0_gart_enable()
Dgmc_v7_0.c472 reg = mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vmid; in gmc_v7_0_emit_flush_gpu_tlb()
643 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, table_addr >> 12); in gmc_v7_0_gart_enable()
666 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i, in gmc_v7_0_gart_enable()
Dgmc_v8_0.c663 reg = mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vmid; in gmc_v8_0_emit_flush_gpu_tlb()
874 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, table_addr >> 12); in gmc_v8_0_gart_enable()
897 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i, in gmc_v8_0_gart_enable()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_d.h580 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x54f macro
Dgmc_8_2_d.h638 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x54f macro
Dgmc_6_0_d.h1219 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x054F macro
Dgmc_7_1_d.h613 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x54f macro
Dgmc_8_1_d.h636 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x54f macro