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Searched refs:mmVGT_ESGS_RING_SIZE (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1664 #define mmVGT_ESGS_RING_SIZE 0x2232 macro
Dgfx_7_2_d.h2411 #define mmVGT_ESGS_RING_SIZE 0xc240 macro
Dgfx_7_0_d.h2386 #define mmVGT_ESGS_RING_SIZE 0xc240 macro
Dgfx_8_0_d.h2651 #define mmVGT_ESGS_RING_SIZE 0xc240 macro
Dgfx_8_1_d.h2630 #define mmVGT_ESGS_RING_SIZE 0xc240 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c7204 data = RREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE); in gfx_v10_0_check_grbm_cam_remapping()
7205 WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE, 0); in gfx_v10_0_check_grbm_cam_remapping()
7208 if (RREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE) == pattern) { in gfx_v10_0_check_grbm_cam_remapping()
7212 WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE, data); in gfx_v10_0_check_grbm_cam_remapping()
7331 (SOC15_REG_OFFSET(GC, 0, mmVGT_ESGS_RING_SIZE) << in gfx_v10_0_setup_grbm_cam_remapping()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h2287 #define mmVGT_ESGS_RING_SIZE macro
Dgc_10_3_0_offset.h2362 #define mmVGT_ESGS_RING_SIZE macro