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Searched refs:mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_d.h82 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3DB1 macro
Duvd_4_2_d.h78 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3db1 macro
Duvd_3_1_d.h80 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3db1 macro
Duvd_5_0_d.h84 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3db1 macro
Duvd_6_0_d.h100 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3db1 macro
Duvd_7_0_offset.h212 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h398 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
Dvcn_2_5_offset.h821 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
Dvcn_2_0_0_offset.h702 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
Dvcn_3_0_0_offset.h1207 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Duvd_v3_1.c664 tmp = PACKET0(mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL, 0); in uvd_v3_1_hw_init()
Duvd_v4_2.c178 tmp = PACKET0(mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL, 0); in uvd_v4_2_hw_init()
Duvd_v5_0.c175 tmp = PACKET0(mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL, 0); in uvd_v5_0_hw_init()
Duvd_v6_0.c487 tmp = PACKET0(mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL, 0); in uvd_v6_0_hw_init()
Duvd_v7_0.c553 mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL), 0); in uvd_v7_0_hw_init()