Searched refs:mmUVD_LMI_STATUS (Results 1 – 15 of 15) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_4_0_d.h | 50 #define mmUVD_LMI_STATUS 0x3D67 macro
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| D | uvd_4_2_d.h | 50 #define mmUVD_LMI_STATUS 0x3d67 macro
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| D | uvd_3_1_d.h | 52 #define mmUVD_LMI_STATUS 0x3d67 macro
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| D | uvd_5_0_d.h | 56 #define mmUVD_LMI_STATUS 0x3d67 macro
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| D | uvd_6_0_d.h | 72 #define mmUVD_LMI_STATUS 0x3d67 macro
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | uvd_v3_1.c | 467 status = RREG32(mmUVD_LMI_STATUS); in uvd_v3_1_stop()
481 status = RREG32(mmUVD_LMI_STATUS); in uvd_v3_1_stop()
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| D | uvd_v4_2.c | 430 status = RREG32(mmUVD_LMI_STATUS); in uvd_v4_2_stop()
444 status = RREG32(mmUVD_LMI_STATUS); in uvd_v4_2_stop()
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| D | vcn_v1_0.c | 1171 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v1_0_stop_spg_mode()
1180 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v1_0_stop_spg_mode()
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| D | vcn_v2_0.c | 1198 r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v2_0_stop()
1209 r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v2_0_stop()
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| D | vcn_v2_5.c | 1450 r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v2_5_stop()
1461 r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v2_5_stop()
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| D | vcn_v3_0.c | 1591 r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v3_0_stop()
1601 r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v3_0_stop()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| D | vcn_1_0_offset.h | 338 #define mmUVD_LMI_STATUS … macro
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| D | vcn_2_5_offset.h | 961 #define mmUVD_LMI_STATUS … macro
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| D | vcn_2_0_0_offset.h | 564 #define mmUVD_LMI_STATUS … macro
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| D | vcn_3_0_0_offset.h | 1475 #define mmUVD_LMI_STATUS … macro
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