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Searched refs:mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_5_0_d.h41 #define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH 0x3c66 macro
Duvd_6_0_d.h52 #define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH 0x3c66 macro
Duvd_7_0_offset.h110 #define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h236 #define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH macro
Dvcn_2_5_offset.h855 #define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH macro
Dvcn_2_0_0_offset.h954 #define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH macro
Dvcn_3_0_0_offset.h1269 #define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c566 amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH, 0)); in uvd_v5_0_ring_emit_ib()
Duvd_v6_0.c1035 amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH, 0)); in uvd_v6_0_ring_emit_ib()
Duvd_v7_0.c1336 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH), 0)); in uvd_v7_0_ring_emit_ib()
Dvcn_v1_0.c1564 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH), 0)); in vcn_v1_0_dec_ring_emit_ib()