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Searched refs:mmUVD_GP_SCRATCH4 (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_d.h45 #define mmUVD_GP_SCRATCH4 0x3D38 macro
Duvd_6_0_d.h132 #define mmUVD_GP_SCRATCH4 0x3d38 macro
Duvd_7_0_offset.h148 #define mmUVD_GP_SCRATCH4 … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h318 #define mmUVD_GP_SCRATCH4 … macro
Dvcn_2_5_offset.h641 #define mmUVD_GP_SCRATCH4 … macro
Dvcn_2_0_0_offset.h526 #define mmUVD_GP_SCRATCH4 … macro
Dvcn_3_0_0_offset.h991 #define mmUVD_GP_SCRATCH4 … macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Duvd_v7_0.c727 WREG32_SOC15(UVD, i, mmUVD_GP_SCRATCH4, adev->uvd.max_handles); in uvd_v7_0_mc_resume()
863 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_GP_SCRATCH4), adev->uvd.max_handles); in uvd_v7_0_sriov_start()
Duvd_v6_0.c636 WREG32(mmUVD_GP_SCRATCH4, adev->uvd.max_handles); in uvd_v6_0_mc_resume()