Searched refs:mmUVD_DPG_LMA_CTL (Results 1 – 14 of 14) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_vcn.h | 83 WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_CTL, \ 95 WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_CTL, \ 137 WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_LMA_CTL, \ 151 mmUVD_DPG_LMA_CTL, \
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D | amdgpu_jpeg.h | 42 mmUVD_DPG_LMA_CTL, \ 56 WREG32_SOC15(JPEG, inst_idx, mmUVD_DPG_LMA_CTL, \
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D | jpeg_v4_0_5.c | 37 #define mmUVD_DPG_LMA_CTL regUVD_DPG_LMA_CTL macro
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D | vcn_v4_0_5.c | 42 #define mmUVD_DPG_LMA_CTL regUVD_DPG_LMA_CTL macro
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D | vcn_v4_0_3.c | 40 #define mmUVD_DPG_LMA_CTL regUVD_DPG_LMA_CTL macro
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D | vcn_v1_0.c | 78 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_DPG_LMA_CTL),
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D | vcn_v2_0.c | 86 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_DPG_LMA_CTL),
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D | vcn_v4_0.c | 42 #define mmUVD_DPG_LMA_CTL regUVD_DPG_LMA_CTL macro
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D | vcn_v2_5.c | 89 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_DPG_LMA_CTL),
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D | vcn_v3_0.c | 93 SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_DPG_LMA_CTL),
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
D | vcn_1_0_offset.h | 36 #define mmUVD_DPG_LMA_CTL … macro
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D | vcn_2_5_offset.h | 409 #define mmUVD_DPG_LMA_CTL … macro
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D | vcn_2_0_0_offset.h | 394 #define mmUVD_DPG_LMA_CTL … macro
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D | vcn_3_0_0_offset.h | 685 #define mmUVD_DPG_LMA_CTL … macro
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