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Searched refs:mmTPC_PLL_DIV_SEL_3 (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/accel/habanalabs/include/goya/asic_reg/
Dtpc_pll_regs.h66 #define mmTPC_PLL_DIV_SEL_3 0xE0128C macro
/linux-6.12.1/drivers/accel/habanalabs/goya/
Dgoya.c1429 WREG32(mmTPC_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()