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Searched refs:mmTPC5_CFG_QM_TENSOR_0_BASE_ADDR_HIGH (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/accel/habanalabs/include/goya/asic_reg/
Dtpc5_cfg_regs.h464 #define mmTPC5_CFG_QM_TENSOR_0_BASE_ADDR_HIGH 0xF46A04 macro
/linux-6.12.1/drivers/accel/habanalabs/include/gaudi/asic_reg/
Dtpc5_cfg_regs.h684 #define mmTPC5_CFG_QM_TENSOR_0_BASE_ADDR_HIGH 0xF46A04 macro