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Searched refs:mmSQ_IND_DATA (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1436 #define mmSQ_IND_DATA 0x2379 macro
Dgfx_7_2_d.h1923 #define mmSQ_IND_DATA 0x2379 macro
Dgfx_7_0_d.h1902 #define mmSQ_IND_DATA 0x2379 macro
Dgfx_8_0_d.h2121 #define mmSQ_IND_DATA 0x2379 macro
Dgfx_8_1_d.h2089 #define mmSQ_IND_DATA 0x2379 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c2952 return RREG32(mmSQ_IND_DATA); in wave_read_ind()
2967 *(out++) = RREG32(mmSQ_IND_DATA); in wave_read_regs()
Dgfx_v7_0.c4056 return RREG32(mmSQ_IND_DATA); in wave_read_ind()
4071 *(out++) = RREG32(mmSQ_IND_DATA); in wave_read_regs()
Dgfx_v8_0.c5196 return RREG32(mmSQ_IND_DATA); in wave_read_ind()
5211 *(out++) = RREG32(mmSQ_IND_DATA); in wave_read_regs()
Dgfx_v9_0.c1925 return RREG32_SOC15(GC, 0, mmSQ_IND_DATA); in wave_read_ind()
1940 *(out++) = RREG32_SOC15(GC, 0, mmSQ_IND_DATA); in wave_read_regs()
Dgfx_v10_0.c4416 return RREG32_SOC15(GC, 0, mmSQ_IND_DATA); in wave_read_ind()
4429 *(out++) = RREG32_SOC15(GC, 0, mmSQ_IND_DATA); in wave_read_regs()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h461 #define mmSQ_IND_DATA … macro
Dgc_9_1_offset.h455 #define mmSQ_IND_DATA … macro
Dgc_9_2_1_offset.h445 #define mmSQ_IND_DATA … macro
Dgc_10_1_0_offset.h2531 #define mmSQ_IND_DATA … macro
Dgc_10_3_0_offset.h2622 #define mmSQ_IND_DATA … macro