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Searched refs:mmSPI_CONFIG_CNTL (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsi.c81 mmSPI_CONFIG_CNTL, 0x07ffffff, 0x03000000,
137 mmSPI_CONFIG_CNTL, 0x07ffffff, 0x03000000,
320 mmSPI_CONFIG_CNTL, 0x07ffffff, 0x03000000,
358 mmSPI_CONFIG_CNTL, 0x07ffffff, 0x03000000,
407 mmSPI_CONFIG_CNTL, 0x03e00000, 0x03600000,
Dgfx_v7_0.c1953 tmp = RREG32(mmSPI_CONFIG_CNTL); in gfx_v7_0_constants_init()
1955 WREG32(mmSPI_CONFIG_CNTL, tmp); in gfx_v7_0_constants_init()
Dgfx_v10_0.c7347 (SOC15_REG_OFFSET(GC, 0, mmSPI_CONFIG_CNTL) << in gfx_v10_0_setup_grbm_cam_remapping()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1194 #define mmSPI_CONFIG_CNTL 0x2440 macro
Dgfx_7_2_d.h1473 #define mmSPI_CONFIG_CNTL 0x2440 macro
Dgfx_7_0_d.h1452 #define mmSPI_CONFIG_CNTL 0x2440 macro
Dgfx_8_0_d.h1663 #define mmSPI_CONFIG_CNTL 0x2440 macro
Dgfx_8_1_d.h1631 #define mmSPI_CONFIG_CNTL 0x2440 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h5137 #define mmSPI_CONFIG_CNTL macro
Dgc_9_1_offset.h5367 #define mmSPI_CONFIG_CNTL macro
Dgc_9_2_1_offset.h5325 #define mmSPI_CONFIG_CNTL macro
Dgc_10_1_0_offset.h2589 #define mmSPI_CONFIG_CNTL macro
Dgc_10_3_0_offset.h2684 #define mmSPI_CONFIG_CNTL macro