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Searched refs:mmRLC_UCODE_CNTL (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1179 #define mmRLC_UCODE_CNTL 0x30D2 macro
Dgfx_7_2_d.h1284 #define mmRLC_UCODE_CNTL 0x30e7 macro
Dgfx_7_0_d.h1271 #define mmRLC_UCODE_CNTL 0x30e7 macro
Dgfx_8_0_d.h1382 #define mmRLC_UCODE_CNTL 0xec27 macro
Dgfx_8_1_d.h1384 #define mmRLC_UCODE_CNTL 0xec27 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c2504 WREG32(mmRLC_UCODE_CNTL, 0); in gfx_v6_0_rlc_resume()
Dgfx_v7_0.c3444 WREG32(mmRLC_UCODE_CNTL, 0); in gfx_v7_0_rlc_resume()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6021 #define mmRLC_UCODE_CNTL macro
Dgc_9_1_offset.h6243 #define mmRLC_UCODE_CNTL macro
Dgc_9_2_1_offset.h6207 #define mmRLC_UCODE_CNTL macro
Dgc_10_1_0_offset.h9355 #define mmRLC_UCODE_CNTL macro
Dgc_10_3_0_offset.h9153 #define mmRLC_UCODE_CNTL macro