Searched refs:mmRLC_SPM_MC_CNTL (Results 1 – 7 of 7) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_0.c | 5125 reg = SOC15_REG_OFFSET(GC, 0, mmRLC_SPM_MC_CNTL); in gfx_v9_0_update_spm_vmid_internal()
5129 data = RREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL); in gfx_v9_0_update_spm_vmid_internal()
5135 WREG32_SOC15_NO_KIQ(GC, 0, mmRLC_SPM_MC_CNTL, data); in gfx_v9_0_update_spm_vmid_internal()
5137 WREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL, data); in gfx_v9_0_update_spm_vmid_internal()
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| D | gfx_v10_0.c | 8194 reg = SOC15_REG_OFFSET(GC, 0, mmRLC_SPM_MC_CNTL); in gfx_v10_0_update_spm_vmid_internal()
8206 WREG32_SOC15_NO_KIQ(GC, 0, mmRLC_SPM_MC_CNTL, data); in gfx_v10_0_update_spm_vmid_internal()
8208 WREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL, data); in gfx_v10_0_update_spm_vmid_internal()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 6115 #define mmRLC_SPM_MC_CNTL … macro
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| D | gc_9_1_offset.h | 6337 #define mmRLC_SPM_MC_CNTL … macro
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| D | gc_9_2_1_offset.h | 6315 #define mmRLC_SPM_MC_CNTL … macro
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| D | gc_10_1_0_offset.h | 9461 #define mmRLC_SPM_MC_CNTL … macro
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| D | gc_10_3_0_offset.h | 9283 #define mmRLC_SPM_MC_CNTL … macro
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