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Searched refs:mmRLC_LB_INIT_CU_MASK (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1151 #define mmRLC_LB_INIT_CU_MASK 0x3107 macro
Dgfx_7_2_d.h1300 #define mmRLC_LB_INIT_CU_MASK 0x310f macro
Dgfx_7_0_d.h1287 #define mmRLC_LB_INIT_CU_MASK 0x310f macro
Dgfx_8_0_d.h1400 #define mmRLC_LB_INIT_CU_MASK 0xec4f macro
Dgfx_8_1_d.h1400 #define mmRLC_LB_INIT_CU_MASK 0xec4f macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c2501 WREG32(mmRLC_LB_INIT_CU_MASK, 0xffffffff); in gfx_v6_0_rlc_resume()
Dgfx_v9_0.c1717 WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff); in gfx_v9_0_init_lbpw()
1766 WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff); in gfx_v9_4_init_lbpw()
Dgfx_v7_0.c3438 WREG32(mmRLC_LB_INIT_CU_MASK, 0xffffffff); in gfx_v7_0_rlc_resume()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6057 #define mmRLC_LB_INIT_CU_MASK macro
Dgc_9_1_offset.h6279 #define mmRLC_LB_INIT_CU_MASK macro
Dgc_9_2_1_offset.h6255 #define mmRLC_LB_INIT_CU_MASK macro