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Searched refs:mmRLC_GPM_TIMER_INT_1_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h5986 #define mmRLC_GPM_TIMER_INT_1_BASE_IDX … macro
Dgc_9_1_offset.h6208 #define mmRLC_GPM_TIMER_INT_1_BASE_IDX … macro
Dgc_9_2_1_offset.h6172 #define mmRLC_GPM_TIMER_INT_1_BASE_IDX … macro
Dgc_10_1_0_offset.h9318 #define mmRLC_GPM_TIMER_INT_1_BASE_IDX … macro
Dgc_10_3_0_offset.h9118 #define mmRLC_GPM_TIMER_INT_1_BASE_IDX … macro