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Searched refs:mmRLC_CP_SCHEDULERS_Sienna_Cichlid (Results 1 – 1 of 1) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c81 #define mmRLC_CP_SCHEDULERS_Sienna_Cichlid 0x4ca1 macro
6576 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid); in gfx_v10_0_kiq_setting()
6579 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp); in gfx_v10_0_kiq_setting()
6581 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp); in gfx_v10_0_kiq_setting()