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Searched refs:mmRLC_CGTT_MGCG_OVERRIDE (Results 1 – 17 of 17) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dmxgpu_vi.c49 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
140 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
Dsi.c428 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
557 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
655 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
755 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
835 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
Dgfx_v8_0.c231 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
434 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
505 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
601 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
5442 data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_get_clockgating_state()
5634 temp = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_medium_grain_clock_gating()
5646 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v8_0_update_medium_grain_clock_gating()
5675 temp = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_medium_grain_clock_gating()
5681 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v8_0_update_medium_grain_clock_gating()
5729 temp1 = data1 = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_coarse_grain_clock_gating()
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Dgfx_v10_0.c7834 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_medium_grain_clock_gating()
7843 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_medium_grain_clock_gating()
7864 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_medium_grain_clock_gating()
7872 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_medium_grain_clock_gating()
7902 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_3d_clock_gating()
7910 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_3d_clock_gating()
7959 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_coarse_grain_clock_gating()
7970 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_coarse_grain_clock_gating()
8018 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_fine_grain_clock_gating()
8023 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_fine_grain_clock_gating()
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Dgfx_v9_0.c4923 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_medium_grain_clock_gating()
4936 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_medium_grain_clock_gating()
4957 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_medium_grain_clock_gating()
4968 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_medium_grain_clock_gating()
5001 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_3d_clock_gating()
5006 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_3d_clock_gating()
5051 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_coarse_grain_clock_gating()
5060 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_coarse_grain_clock_gating()
5274 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE)); in gfx_v9_0_get_clockgating_state()
Dgfx_v6_0.c2582 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v6_0_enable_mgcg()
2585 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v6_0_enable_mgcg()
2595 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v6_0_enable_mgcg()
2598 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v6_0_enable_mgcg()
Dgfx_v7_0.c3538 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v7_0_enable_mgcg()
3542 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v7_0_enable_mgcg()
3573 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v7_0_enable_mgcg()
3576 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v7_0_enable_mgcg()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1135 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3100 macro
Dgfx_7_2_d.h1293 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3108 macro
Dgfx_7_0_d.h1280 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3108 macro
Dgfx_8_0_d.h1391 #define mmRLC_CGTT_MGCG_OVERRIDE 0xec48 macro
Dgfx_8_1_d.h1393 #define mmRLC_CGTT_MGCG_OVERRIDE 0xec48 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6043 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
Dgc_9_1_offset.h6265 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
Dgc_9_2_1_offset.h6241 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
Dgc_10_1_0_offset.h9391 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
Dgc_10_3_0_offset.h9213 #define mmRLC_CGTT_MGCG_OVERRIDE … macro