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Searched refs:mmOTG0_OTG_COUNT_RESET (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h4786 #define mmOTG0_OTG_COUNT_RESET … macro
Ddcn_3_0_3_offset.h4149 #define mmOTG0_OTG_COUNT_RESET … macro
Ddcn_3_0_1_offset.h6554 #define mmOTG0_OTG_COUNT_RESET … macro
Ddcn_1_0_offset.h6349 #define mmOTG0_OTG_COUNT_RESET … macro
Ddcn_2_1_0_offset.h8007 #define mmOTG0_OTG_COUNT_RESET … macro
Ddcn_3_0_2_offset.h7903 #define mmOTG0_OTG_COUNT_RESET … macro
Ddcn_2_0_0_offset.h9038 #define mmOTG0_OTG_COUNT_RESET … macro
Ddcn_3_0_0_offset.h8757 #define mmOTG0_OTG_COUNT_RESET … macro