Home
last modified time | relevance | path

Searched refs:mmODM1_OPTC_INPUT_CLOCK_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h4713 #define mmODM1_OPTC_INPUT_CLOCK_CONTROL_BASE_IDX macro
Ddcn_3_0_3_offset.h4072 #define mmODM1_OPTC_INPUT_CLOCK_CONTROL_BASE_IDX macro
Ddcn_3_0_1_offset.h6437 #define mmODM1_OPTC_INPUT_CLOCK_CONTROL_BASE_IDX macro
Ddcn_1_0_offset.h6218 #define mmODM1_OPTC_INPUT_CLOCK_CONTROL_BASE_IDX macro
Ddcn_2_1_0_offset.h7846 #define mmODM1_OPTC_INPUT_CLOCK_CONTROL_BASE_IDX macro
Ddcn_3_0_2_offset.h7766 #define mmODM1_OPTC_INPUT_CLOCK_CONTROL_BASE_IDX macro
Ddcn_2_0_0_offset.h8877 #define mmODM1_OPTC_INPUT_CLOCK_CONTROL_BASE_IDX macro
Ddcn_3_0_0_offset.h8598 #define mmODM1_OPTC_INPUT_CLOCK_CONTROL_BASE_IDX macro