Home
last modified time | relevance | path

Searched refs:mmMPCC3_MPCC_TOP_GAIN_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h3686 #define mmMPCC3_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_3_0_1_offset.h10353 #define mmMPCC3_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_2_1_0_offset.h5713 #define mmMPCC3_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_3_0_2_offset.h12687 #define mmMPCC3_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_2_0_0_offset.h6651 #define mmMPCC3_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_3_0_0_offset.h13998 #define mmMPCC3_MPCC_TOP_GAIN_BASE_IDX … macro