Home
last modified time | relevance | path

Searched refs:mmMPCC0_MPCC_MEM_PWR_CTRL (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h3595 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
Ddcn_3_0_3_offset.h6162 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
Ddcn_3_0_1_offset.h10268 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
Ddcn_2_1_0_offset.h5622 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
Ddcn_3_0_2_offset.h12602 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
Ddcn_2_0_0_offset.h6560 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
Ddcn_3_0_0_offset.h13913 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro