Searched refs:mmMC_SEQ_WR_CTL_D1_LP (Results 1 – 7 of 7) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| D | gmc_6_0_d.h | 1006 #define mmMC_SEQ_WR_CTL_D1_LP 0x0AA0 macro
|
| D | gmc_7_1_d.h | 819 #define mmMC_SEQ_WR_CTL_D1_LP 0xaa0 macro
|
| D | gmc_8_1_d.h | 923 #define mmMC_SEQ_WR_CTL_D1_LP 0xaa0 macro
|
| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| D | iceland_smumgr.c | 2433 *out_reg = mmMC_SEQ_WR_CTL_D1_LP; in iceland_check_s0_mc_reg_index()
2631 …cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in iceland_initialize_mc_reg_table()
|
| D | ci_smumgr.c | 2506 *out_reg = mmMC_SEQ_WR_CTL_D1_LP; in ci_check_s0_mc_reg_index()
2704 …cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in ci_initialize_mc_reg_table()
|
| D | tonga_smumgr.c | 2895 *out_reg = mmMC_SEQ_WR_CTL_D1_LP; in tonga_check_s0_mc_reg_index()
3109 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, in tonga_initialize_mc_reg_table()
|
| D | fiji_smumgr.c | 2529 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, in fiji_initialize_mc_reg_table()
|