Searched refs:mmHDMI_ACR_44_0 (Results 1 – 9 of 9) sorted by relevance
1449 tmp = RREG32(mmHDMI_ACR_44_0 + dig->afmt->offset); in dce_v6_0_audio_set_acr()1451 WREG32(mmHDMI_ACR_44_0 + dig->afmt->offset, tmp); in dce_v6_0_audio_set_acr()
1498 tmp = RREG32(mmHDMI_ACR_44_0 + dig->afmt->offset); in dce_v10_0_afmt_update_ACR()1500 WREG32(mmHDMI_ACR_44_0 + dig->afmt->offset, tmp); in dce_v10_0_afmt_update_ACR()
1547 tmp = RREG32(mmHDMI_ACR_44_0 + dig->afmt->offset); in dce_v11_0_afmt_update_ACR()1549 WREG32(mmHDMI_ACR_44_0 + dig->afmt->offset, tmp); in dce_v11_0_afmt_update_ACR()
1475 WREG32(mmHDMI_ACR_44_0 + offset, (acr.cts_44_1khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT)); in dce_v8_0_afmt_update_ACR()
3852 #define mmHDMI_ACR_44_0 0x1C39 macro
3199 #define mmHDMI_ACR_44_0 0x1c39 macro
3978 #define mmHDMI_ACR_44_0 0x4a30 macro
3847 #define mmHDMI_ACR_44_0 0x4a30 macro
5078 #define mmHDMI_ACR_44_0 0x4a30 macro