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Searched refs:mmGRBM_STATUS2 (Results 1 – 23 of 23) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_1_offset.h30 #define mmGRBM_STATUS2 macro
Dgc_9_0_offset.h37 #define mmGRBM_STATUS2 macro
Dgc_9_1_offset.h37 #define mmGRBM_STATUS2 macro
Dgc_9_2_1_offset.h37 #define mmGRBM_STATUS2 macro
Dgc_10_1_0_offset.h2041 #define mmGRBM_STATUS2 macro
Dgc_10_3_0_offset.h2122 #define mmGRBM_STATUS2 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfxhub_v2_1.c678 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfxhub_v2_1_halt()
684 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfxhub_v2_1_halt()
Dnv.c337 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS2)},
Dsoc15.c360 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS2)},
Dcik.c1045 {mmGRBM_STATUS2},
Dvi.c668 {mmGRBM_STATUS2},
Dsdma_v5_2.c109 SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2)
Dsi.c1114 {mmGRBM_STATUS2},
Dsdma_v5_0.c108 SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2)
Dgfx_v8_0.c4838 || RREG32(mmGRBM_STATUS2) != 0x8) in gfx_v8_0_is_idle()
4848 if (RREG32(mmGRBM_STATUS2) != 0x8) in gfx_v8_0_rlc_is_idle()
4948 tmp = RREG32(mmGRBM_STATUS2); in gfx_v8_0_check_soft_reset()
Dgfx_v9_0.c155 SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2),
4114 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfx_v9_0_soft_reset()
Dgfx_v7_0.c4566 tmp = RREG32(mmGRBM_STATUS2); in gfx_v7_0_soft_reset()
Dgfx_v10_0.c281 SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2),
7526 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfx_v10_0_soft_reset()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h778 #define mmGRBM_STATUS2 0x2002 macro
Dgfx_7_2_d.h788 #define mmGRBM_STATUS2 0x2002 macro
Dgfx_7_0_d.h775 #define mmGRBM_STATUS2 0x2002 macro
Dgfx_8_0_d.h863 #define mmGRBM_STATUS2 0x2002 macro
Dgfx_8_1_d.h862 #define mmGRBM_STATUS2 0x2002 macro