| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_1_offset.h | 40 #define mmGRBM_SOFT_RESET … macro
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| D | gc_9_0_offset.h | 47 #define mmGRBM_SOFT_RESET … macro
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| D | gc_9_1_offset.h | 47 #define mmGRBM_SOFT_RESET … macro
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| D | gc_9_2_1_offset.h | 47 #define mmGRBM_SOFT_RESET … macro
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| D | gc_10_1_0_offset.h | 2053 #define mmGRBM_SOFT_RESET … macro
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| D | gc_10_3_0_offset.h | 2134 #define mmGRBM_SOFT_RESET … macro
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v5_2.c | 752 tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); in sdma_v5_2_soft_reset()
755 WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); in sdma_v5_2_soft_reset()
756 tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); in sdma_v5_2_soft_reset()
761 WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); in sdma_v5_2_soft_reset()
762 tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); in sdma_v5_2_soft_reset()
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| D | gfx_v7_0.c | 3388 u32 tmp = RREG32(mmGRBM_SOFT_RESET); in gfx_v7_0_rlc_reset()
3391 WREG32(mmGRBM_SOFT_RESET, tmp); in gfx_v7_0_rlc_reset()
3394 WREG32(mmGRBM_SOFT_RESET, tmp); in gfx_v7_0_rlc_reset()
4590 tmp = RREG32(mmGRBM_SOFT_RESET); in gfx_v7_0_soft_reset()
4593 WREG32(mmGRBM_SOFT_RESET, tmp); in gfx_v7_0_soft_reset()
4594 tmp = RREG32(mmGRBM_SOFT_RESET); in gfx_v7_0_soft_reset()
4599 WREG32(mmGRBM_SOFT_RESET, tmp); in gfx_v7_0_soft_reset()
4600 tmp = RREG32(mmGRBM_SOFT_RESET); in gfx_v7_0_soft_reset()
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| D | gfx_v8_0.c | 5049 tmp = RREG32(mmGRBM_SOFT_RESET); in gfx_v8_0_soft_reset()
5052 WREG32(mmGRBM_SOFT_RESET, tmp); in gfx_v8_0_soft_reset()
5053 tmp = RREG32(mmGRBM_SOFT_RESET); in gfx_v8_0_soft_reset()
5058 WREG32(mmGRBM_SOFT_RESET, tmp); in gfx_v8_0_soft_reset()
5059 tmp = RREG32(mmGRBM_SOFT_RESET); in gfx_v8_0_soft_reset()
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| D | gfx_v9_0.c | 4132 tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); in gfx_v9_0_soft_reset()
4135 WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); in gfx_v9_0_soft_reset()
4136 tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); in gfx_v9_0_soft_reset()
4141 WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); in gfx_v9_0_soft_reset()
4142 tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); in gfx_v9_0_soft_reset()
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| D | gfx_v10_0.c | 7561 tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); in gfx_v10_0_soft_reset()
7564 WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); in gfx_v10_0_soft_reset()
7565 tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); in gfx_v10_0_soft_reset()
7570 WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); in gfx_v10_0_soft_reset()
7571 tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET); in gfx_v10_0_soft_reset()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_6_0_d.h | 776 #define mmGRBM_SOFT_RESET 0x2008 macro
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| D | gfx_7_2_d.h | 793 #define mmGRBM_SOFT_RESET 0x2008 macro
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| D | gfx_7_0_d.h | 780 #define mmGRBM_SOFT_RESET 0x2008 macro
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| D | gfx_8_0_d.h | 868 #define mmGRBM_SOFT_RESET 0x2008 macro
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| D | gfx_8_1_d.h | 867 #define mmGRBM_SOFT_RESET 0x2008 macro
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| D | fiji_smumgr.c | 215 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff); in fiji_start_avfs_btc()
217 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0); in fiji_start_avfs_btc()
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| D | polaris10_smumgr.c | 113 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff); in polaris10_perform_btc()
114 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0); in polaris10_perform_btc()
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