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Searched refs:mmGCMC_VM_MX_L1_TLB_CNTL_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h3740 #define mmGCMC_VM_MX_L1_TLB_CNTL_BASE_IDX … macro
Dgc_10_3_0_offset.h3693 #define mmGCMC_VM_MX_L1_TLB_CNTL_BASE_IDX … macro