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Searched refs:mmDP_DTO0_PHASE (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3539 #define mmDP_DTO0_PHASE 0x0141 macro
Ddce_8_0_d.h1039 #define mmDP_DTO0_PHASE 0x141 macro
Ddce_10_0_d.h1197 #define mmDP_DTO0_PHASE 0x141 macro
Ddce_11_0_d.h1009 #define mmDP_DTO0_PHASE 0x141 macro
Ddce_11_2_d.h1083 #define mmDP_DTO0_PHASE 0x141 macro
Ddce_12_0_offset.h774 #define mmDP_DTO0_PHASE … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h90 #define mmDP_DTO0_PHASE … macro
Ddcn_3_0_3_offset.h181 #define mmDP_DTO0_PHASE … macro
Ddcn_3_0_1_offset.h270 #define mmDP_DTO0_PHASE … macro
Ddcn_1_0_offset.h574 #define mmDP_DTO0_PHASE … macro
Ddcn_2_1_0_offset.h224 #define mmDP_DTO0_PHASE … macro
Ddcn_3_0_2_offset.h208 #define mmDP_DTO0_PHASE … macro
Ddcn_2_0_0_offset.h212 #define mmDP_DTO0_PHASE … macro
Ddcn_3_0_0_offset.h194 #define mmDP_DTO0_PHASE … macro