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Searched refs:mmDP5_DP_DPHY_TRAINING_PATTERN_SEL (Results 1 – 10 of 10) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3389 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4BD1 macro
Ddce_8_0_d.h3881 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4bd1 macro
Ddce_10_0_d.h4513 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4fb0 macro
Ddce_11_0_d.h4493 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4fb0 macro
Ddce_11_2_d.h5725 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4fb0 macro
Ddce_12_0_offset.h11646 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h9929 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL … macro
Ddcn_3_0_2_offset.h11291 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL … macro
Ddcn_2_0_0_offset.h12616 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL … macro
Ddcn_3_0_0_offset.h12443 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL … macro