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Searched refs:mmDP1_DP_MSE_SAT_UPDATE (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3196 #define mmDP1_DP_MSE_SAT_UPDATE 0x1FE7 macro
Ddce_8_0_d.h4141 #define mmDP1_DP_MSE_SAT_UPDATE 0x1fe7 macro
Ddce_10_0_d.h4773 #define mmDP1_DP_MSE_SAT_UPDATE 0x4bd5 macro
Ddce_11_0_d.h4838 #define mmDP1_DP_MSE_SAT_UPDATE 0x4bd5 macro
Ddce_11_2_d.h6070 #define mmDP1_DP_MSE_SAT_UPDATE 0x4bd5 macro
Ddce_12_0_offset.h10576 #define mmDP1_DP_MSE_SAT_UPDATE … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5876 #define mmDP1_DP_MSE_SAT_UPDATE … macro
Ddcn_3_0_3_offset.h5393 #define mmDP1_DP_MSE_SAT_UPDATE … macro
Ddcn_3_0_1_offset.h8352 #define mmDP1_DP_MSE_SAT_UPDATE … macro
Ddcn_1_0_offset.h8751 #define mmDP1_DP_MSE_SAT_UPDATE … macro
Ddcn_2_1_0_offset.h10275 #define mmDP1_DP_MSE_SAT_UPDATE … macro
Ddcn_3_0_2_offset.h9987 #define mmDP1_DP_MSE_SAT_UPDATE … macro
Ddcn_2_0_0_offset.h11366 #define mmDP1_DP_MSE_SAT_UPDATE … macro
Ddcn_3_0_0_offset.h11131 #define mmDP1_DP_MSE_SAT_UPDATE … macro