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Searched refs:mmDP1_DP_DPHY_8B10B_CNTL (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3168 #define mmDP1_DP_DPHY_8B10B_CNTL 0x1FD3 macro
Ddce_8_0_d.h3909 #define mmDP1_DP_DPHY_8B10B_CNTL 0x1fd3 macro
Ddce_10_0_d.h4541 #define mmDP1_DP_DPHY_8B10B_CNTL 0x4bb4 macro
Ddce_11_0_d.h4529 #define mmDP1_DP_DPHY_8B10B_CNTL 0x4bb4 macro
Ddce_11_2_d.h5761 #define mmDP1_DP_DPHY_8B10B_CNTL 0x4bb4 macro
Ddce_12_0_offset.h10518 #define mmDP1_DP_DPHY_8B10B_CNTL … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5822 #define mmDP1_DP_DPHY_8B10B_CNTL … macro
Ddcn_3_0_3_offset.h5339 #define mmDP1_DP_DPHY_8B10B_CNTL … macro
Ddcn_3_0_1_offset.h8298 #define mmDP1_DP_DPHY_8B10B_CNTL … macro
Ddcn_1_0_offset.h8697 #define mmDP1_DP_DPHY_8B10B_CNTL … macro
Ddcn_2_1_0_offset.h10221 #define mmDP1_DP_DPHY_8B10B_CNTL … macro
Ddcn_3_0_2_offset.h9933 #define mmDP1_DP_DPHY_8B10B_CNTL … macro
Ddcn_2_0_0_offset.h11312 #define mmDP1_DP_DPHY_8B10B_CNTL … macro
Ddcn_3_0_0_offset.h11077 #define mmDP1_DP_DPHY_8B10B_CNTL … macro