Home
last modified time | relevance | path

Searched refs:mmDP0_DP_DPHY_8B10B_CNTL (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3116 #define mmDP0_DP_DPHY_8B10B_CNTL 0x1CD3 macro
Ddce_8_0_d.h3908 #define mmDP0_DP_DPHY_8B10B_CNTL 0x1cd3 macro
Ddce_10_0_d.h4540 #define mmDP0_DP_DPHY_8B10B_CNTL 0x4ab4 macro
Ddce_11_0_d.h4528 #define mmDP0_DP_DPHY_8B10B_CNTL 0x4ab4 macro
Ddce_11_2_d.h5760 #define mmDP0_DP_DPHY_8B10B_CNTL 0x4ab4 macro
Ddce_12_0_offset.h10234 #define mmDP0_DP_DPHY_8B10B_CNTL … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5502 #define mmDP0_DP_DPHY_8B10B_CNTL … macro
Ddcn_3_0_3_offset.h4996 #define mmDP0_DP_DPHY_8B10B_CNTL … macro
Ddcn_3_0_1_offset.h7958 #define mmDP0_DP_DPHY_8B10B_CNTL … macro
Ddcn_1_0_offset.h8387 #define mmDP0_DP_DPHY_8B10B_CNTL … macro
Ddcn_2_1_0_offset.h9891 #define mmDP0_DP_DPHY_8B10B_CNTL … macro
Ddcn_3_0_2_offset.h9590 #define mmDP0_DP_DPHY_8B10B_CNTL … macro
Ddcn_2_0_0_offset.h10984 #define mmDP0_DP_DPHY_8B10B_CNTL … macro
Ddcn_3_0_0_offset.h10734 #define mmDP0_DP_DPHY_8B10B_CNTL … macro