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Searched refs:mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3028 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL 0x1617 macro
Ddce_8_0_d.h3722 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL 0x1617 macro
Ddce_10_0_d.h4347 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL 0x1617 macro
Ddce_11_0_d.h4301 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL 0x1617 macro
Ddce_11_2_d.h5533 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL 0x1617 macro
Ddce_12_0_offset.h1272 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h365 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL … macro
Ddcn_3_0_1_offset.h560 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL … macro
Ddcn_1_0_offset.h990 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL … macro
Ddcn_2_1_0_offset.h620 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL … macro
Ddcn_3_0_2_offset.h532 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL … macro
Ddcn_2_0_0_offset.h658 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL … macro
Ddcn_3_0_0_offset.h548 #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL … macro