Home
last modified time | relevance | path

Searched refs:mmDIG4_TMDS_DCBALANCER_CONTROL (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2898 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4884 macro
Ddce_8_0_d.h3468 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4884 macro
Ddce_10_0_d.h4247 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4e73 macro
Ddce_11_0_d.h4192 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4e73 macro
Ddce_11_2_d.h5423 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4e73 macro
Ddce_12_0_offset.h11316 #define mmDIG4_TMDS_DCBALANCER_CONTROL macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h9571 #define mmDIG4_TMDS_DCBALANCER_CONTROL macro
Ddcn_2_1_0_offset.h11147 #define mmDIG4_TMDS_DCBALANCER_CONTROL macro
Ddcn_3_0_2_offset.h10905 #define mmDIG4_TMDS_DCBALANCER_CONTROL macro
Ddcn_2_0_0_offset.h12234 #define mmDIG4_TMDS_DCBALANCER_CONTROL macro
Ddcn_3_0_0_offset.h12049 #define mmDIG4_TMDS_DCBALANCER_CONTROL macro