Home
last modified time | relevance | path

Searched refs:mmDIG3_TMDS_DCBALANCER_CONTROL (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2813 #define mmDIG3_TMDS_DCBALANCER_CONTROL 0x4584 macro
Ddce_8_0_d.h3467 #define mmDIG3_TMDS_DCBALANCER_CONTROL 0x4584 macro
Ddce_10_0_d.h4246 #define mmDIG3_TMDS_DCBALANCER_CONTROL 0x4d73 macro
Ddce_11_0_d.h4191 #define mmDIG3_TMDS_DCBALANCER_CONTROL 0x4d73 macro
Ddce_11_2_d.h5422 #define mmDIG3_TMDS_DCBALANCER_CONTROL 0x4d73 macro
Ddce_12_0_offset.h11032 #define mmDIG3_TMDS_DCBALANCER_CONTROL macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h8924 #define mmDIG3_TMDS_DCBALANCER_CONTROL macro
Ddcn_1_0_offset.h9261 #define mmDIG3_TMDS_DCBALANCER_CONTROL macro
Ddcn_2_1_0_offset.h10817 #define mmDIG3_TMDS_DCBALANCER_CONTROL macro
Ddcn_3_0_2_offset.h10562 #define mmDIG3_TMDS_DCBALANCER_CONTROL macro
Ddcn_2_0_0_offset.h11906 #define mmDIG3_TMDS_DCBALANCER_CONTROL macro
Ddcn_3_0_0_offset.h11706 #define mmDIG3_TMDS_DCBALANCER_CONTROL macro