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Searched refs:mmDIG1_TMDS_CONTROL_CHAR (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2639 #define mmDIG1_TMDS_CONTROL_CHAR 0x1F7D macro
Ddce_8_0_d.h3409 #define mmDIG1_TMDS_CONTROL_CHAR 0x1f7d macro
Ddce_10_0_d.h4188 #define mmDIG1_TMDS_CONTROL_CHAR 0x4b6c macro
Ddce_11_0_d.h4119 #define mmDIG1_TMDS_CONTROL_CHAR 0x4b6c macro
Ddce_11_2_d.h5350 #define mmDIG1_TMDS_CONTROL_CHAR 0x4b6c macro
Ddce_12_0_offset.h10452 #define mmDIG1_TMDS_CONTROL_CHAR … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5750 #define mmDIG1_TMDS_CONTROL_CHAR … macro
Ddcn_3_0_3_offset.h5270 #define mmDIG1_TMDS_CONTROL_CHAR … macro
Ddcn_3_0_1_offset.h8232 #define mmDIG1_TMDS_CONTROL_CHAR … macro
Ddcn_1_0_offset.h8629 #define mmDIG1_TMDS_CONTROL_CHAR … macro
Ddcn_2_1_0_offset.h10145 #define mmDIG1_TMDS_CONTROL_CHAR … macro
Ddcn_3_0_2_offset.h9864 #define mmDIG1_TMDS_CONTROL_CHAR … macro
Ddcn_2_0_0_offset.h11238 #define mmDIG1_TMDS_CONTROL_CHAR … macro
Ddcn_3_0_0_offset.h11008 #define mmDIG1_TMDS_CONTROL_CHAR … macro