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Searched refs:mmDIG0_TMDS_CTL2_3_GEN_CNTL (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2556 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL 0x1C87 macro
Ddce_8_0_d.h3480 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL 0x1c87 macro
Ddce_10_0_d.h4259 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL 0x4a76 macro
Ddce_11_0_d.h4208 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL 0x4a76 macro
Ddce_11_2_d.h5439 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL 0x4a76 macro
Ddce_12_0_offset.h10184 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5448 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_3_0_3_offset.h4945 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_1_0_offset.h8335 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_2_1_0_offset.h9833 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_3_0_2_offset.h9539 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_2_0_0_offset.h10928 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL … macro
Ddcn_3_0_0_offset.h10683 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL … macro