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Searched refs:mmDIG0_HDMI_ACR_32_1 (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2534 #define mmDIG0_HDMI_ACR_32_1 0x1C38 macro
Ddce_8_0_d.h3192 #define mmDIG0_HDMI_ACR_32_1 0x1c38 macro
Ddce_10_0_d.h3971 #define mmDIG0_HDMI_ACR_32_1 0x4a2f macro
Ddce_11_0_d.h3838 #define mmDIG0_HDMI_ACR_32_1 0x4a2f macro
Ddce_11_2_d.h5069 #define mmDIG0_HDMI_ACR_32_1 0x4a2f macro
Ddce_12_0_offset.h10116 #define mmDIG0_HDMI_ACR_32_1 … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5378 #define mmDIG0_HDMI_ACR_32_1 … macro
Ddcn_3_0_3_offset.h4905 #define mmDIG0_HDMI_ACR_32_1 … macro
Ddcn_3_0_1_offset.h7870 #define mmDIG0_HDMI_ACR_32_1 … macro
Ddcn_1_0_offset.h8267 #define mmDIG0_HDMI_ACR_32_1 … macro
Ddcn_2_1_0_offset.h9763 #define mmDIG0_HDMI_ACR_32_1 … macro
Ddcn_3_0_2_offset.h9499 #define mmDIG0_HDMI_ACR_32_1 … macro
Ddcn_2_0_0_offset.h10858 #define mmDIG0_HDMI_ACR_32_1 … macro
Ddcn_3_0_0_offset.h10643 #define mmDIG0_HDMI_ACR_32_1 … macro