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Searched refs:mmDC_I2C_DDC5_HW_STATUS (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1326 #define mmDC_I2C_DDC5_HW_STATUS 0x1821 macro
Ddce_8_0_d.h3550 #define mmDC_I2C_DDC5_HW_STATUS 0x1821 macro
Ddce_10_0_d.h7164 #define mmDC_I2C_DDC5_HW_STATUS 0x16dc macro
Ddce_11_0_d.h7354 #define mmDC_I2C_DDC5_HW_STATUS 0x16dc macro
Ddce_11_2_d.h8746 #define mmDC_I2C_DDC5_HW_STATUS 0x16dc macro
Ddce_12_0_offset.h1652 #define mmDC_I2C_DDC5_HW_STATUS macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h7683 #define mmDC_I2C_DDC5_HW_STATUS macro
Ddcn_2_1_0_offset.h9277 #define mmDC_I2C_DDC5_HW_STATUS macro
Ddcn_3_0_2_offset.h8983 #define mmDC_I2C_DDC5_HW_STATUS macro
Ddcn_2_0_0_offset.h10308 #define mmDC_I2C_DDC5_HW_STATUS macro
Ddcn_3_0_0_offset.h10065 #define mmDC_I2C_DDC5_HW_STATUS macro