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Searched refs:mmCRTC0_CRTC_V_SYNC_A_CNTL (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_timing_generator.c314 mmCRTC0_CRTC_V_SYNC_A_CNTL, in dce120_timing_generator_enable_reset_trigger()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h557 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1B8F macro
Ddce_8_0_d.h250 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1b8f macro
Ddce_10_0_d.h285 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1b8f macro
Ddce_11_0_d.h225 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1b8f macro
Ddce_11_2_d.h232 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1b8f macro
Ddce_12_0_offset.h4086 #define mmCRTC0_CRTC_V_SYNC_A_CNTL macro