Searched refs:mmCP_VMID_RESET (Results 1 – 13 of 13) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_7_2_d.h | 310 #define mmCP_VMID_RESET 0x30b3 macro
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| D | gfx_7_0_d.h | 308 #define mmCP_VMID_RESET 0x30b3 macro
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| D | gfx_8_0_d.h | 341 #define mmCP_VMID_RESET 0x30b3 macro
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| D | gfx_8_1_d.h | 341 #define mmCP_VMID_RESET 0x30b3 macro
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v7_0.c | 4978 gfx_v7_0_ring_emit_wreg(kiq_ring, mmCP_VMID_RESET, tmp); in gfx_v7_0_reset_kgq()
4991 gfx_v7_0_ring_emit_reg_wait(ring, mmCP_VMID_RESET, 0, 0xffff); in gfx_v7_0_reset_kgq()
4992 gfx_v7_0_ring_emit_wreg(ring, mmCP_VMID_RESET, 0); in gfx_v7_0_reset_kgq()
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| D | gfx_v8_0.c | 6912 gfx_v8_0_ring_emit_wreg(kiq_ring, mmCP_VMID_RESET, tmp); in gfx_v8_0_reset_kgq()
6925 gfx_v8_0_ring_emit_reg_wait(ring, mmCP_VMID_RESET, 0, 0xffff); in gfx_v8_0_reset_kgq()
6926 gfx_v8_0_ring_emit_wreg(ring, mmCP_VMID_RESET, 0); in gfx_v8_0_reset_kgq()
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| D | gfx_v9_0.c | 7210 SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), tmp); in gfx_v9_0_reset_kgq()
7224 SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), 0, 0xffff); in gfx_v9_0_reset_kgq()
7226 SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), 0); in gfx_v9_0_reset_kgq()
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| D | gfx_v10_0.c | 9453 SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), tmp); in gfx_v10_0_reset_kgq()
9458 SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), 0, 0xffffffff); in gfx_v10_0_reset_kgq()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 2591 #define mmCP_VMID_RESET … macro
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| D | gc_9_1_offset.h | 2861 #define mmCP_VMID_RESET … macro
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| D | gc_9_2_1_offset.h | 2795 #define mmCP_VMID_RESET … macro
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| D | gc_10_1_0_offset.h | 4933 #define mmCP_VMID_RESET … macro
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| D | gc_10_3_0_offset.h | 4592 #define mmCP_VMID_RESET … macro
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