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Searched refs:mmCP_RB_WPTR_DELAY (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h521 #define mmCP_RB_WPTR_DELAY 0x21C1 macro
Dgfx_7_2_d.h525 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
Dgfx_7_0_d.h512 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
Dgfx_8_0_d.h578 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
Dgfx_8_1_d.h578 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c2059 WREG32(mmCP_RB_WPTR_DELAY, 0); in gfx_v6_0_cp_gfx_resume()
Dgfx_v7_0.c2540 WREG32(mmCP_RB_WPTR_DELAY, 0); in gfx_v7_0_cp_gfx_resume()
Dgfx_v8_0.c4241 WREG32(mmCP_RB_WPTR_DELAY, 0); in gfx_v8_0_cp_gfx_resume()
Dgfx_v9_0.c3329 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0); in gfx_v9_0_cp_gfx_resume()
Dgfx_v10_0.c6353 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0); in gfx_v10_0_cp_gfx_resume()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h215 #define mmCP_RB_WPTR_DELAY macro
Dgc_9_1_offset.h215 #define mmCP_RB_WPTR_DELAY macro
Dgc_9_2_1_offset.h209 #define mmCP_RB_WPTR_DELAY macro
Dgc_10_1_0_offset.h2217 #define mmCP_RB_WPTR_DELAY macro
Dgc_10_3_0_offset.h2300 #define mmCP_RB_WPTR_DELAY macro