Searched refs:mmCP_RB1_WPTR (Results 1 – 13 of 13) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | gfx_v6_0.c | 2113 return RREG32(mmCP_RB1_WPTR); in gfx_v6_0_ring_get_wptr() 2133 WREG32(mmCP_RB1_WPTR, lower_32_bits(ring->wptr)); in gfx_v6_0_ring_set_wptr_compute() 2134 (void)RREG32(mmCP_RB1_WPTR); in gfx_v6_0_ring_set_wptr_compute() 2165 WREG32(mmCP_RB1_WPTR, ring->wptr); in gfx_v6_0_cp_compute_resume()
|
D | gfx_v10_0.c | 303 SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_WPTR), 6413 WREG32_SOC15(GC, 0, mmCP_RB1_WPTR, lower_32_bits(ring->wptr)); in gfx_v10_0_cp_gfx_resume()
|
D | gfx_v9_0.c | 173 SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_WPTR),
|
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_6_0_d.h | 505 #define mmCP_RB1_WPTR 0x3064 macro
|
D | gfx_7_2_d.h | 216 #define mmCP_RB1_WPTR 0x3064 macro
|
D | gfx_7_0_d.h | 216 #define mmCP_RB1_WPTR 0x3064 macro
|
D | gfx_8_0_d.h | 240 #define mmCP_RB1_WPTR 0x3064 macro
|
D | gfx_8_1_d.h | 241 #define mmCP_RB1_WPTR 0x3064 macro
|
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_0_offset.h | 2428 #define mmCP_RB1_WPTR … macro
|
D | gc_9_1_offset.h | 2705 #define mmCP_RB1_WPTR … macro
|
D | gc_9_2_1_offset.h | 2643 #define mmCP_RB1_WPTR … macro
|
D | gc_10_1_0_offset.h | 4769 #define mmCP_RB1_WPTR … macro
|
D | gc_10_3_0_offset.h | 4422 #define mmCP_RB1_WPTR … macro
|