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Searched refs:mmCP_HQD_PQ_BASE (Results 1 – 17 of 17) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/inc/
Dpolaris10_pwrvirus.h1507 { 0xb4540fef, mmCP_HQD_PQ_BASE },
1517 { 0xb4540fef, mmCP_HQD_PQ_BASE },
1527 { 0xb4540fef, mmCP_HQD_PQ_BASE },
1537 { 0xb4540fef, mmCP_HQD_PQ_BASE },
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v9.c498 if (low == RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_BASE) && in kgd_gfx_v9_hqd_is_occupied()
1146 low = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_BASE); in kgd_gfx_v9_hqd_get_pq_addr()
1194 low = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_BASE); in kgd_gfx_v9_hqd_reset()
Damdgpu_amdkfd_gfx_v7.c334 if (low == RREG32(mmCP_HQD_PQ_BASE) && in kgd_hqd_is_occupied()
Damdgpu_amdkfd_gfx_v8.c366 if (low == RREG32(mmCP_HQD_PQ_BASE) && in kgd_hqd_is_occupied()
Damdgpu_amdkfd_gfx_v10_3.c473 if (low == RREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE) && in hqd_is_occupied_v10_3()
Damdgpu_amdkfd_gfx_v10.c487 if (low == RREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE) && in kgd_hqd_is_occupied()
Dgfx_v9_0.c249 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_BASE),
3655 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_BASE, in gfx_v9_0_kiq_init_register()
Dgfx_v10_0.c391 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_BASE),
6940 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE, in gfx_v10_0_kiq_init_register()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_d.h588 #define mmCP_HQD_PQ_BASE 0x324d macro
Dgfx_7_0_d.h575 #define mmCP_HQD_PQ_BASE 0x324d macro
Dgfx_8_0_d.h638 #define mmCP_HQD_PQ_BASE 0x324d macro
Dgfx_8_1_d.h638 #define mmCP_HQD_PQ_BASE 0x324d macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2835 #define mmCP_HQD_PQ_BASE … macro
Dgc_9_1_offset.h3063 #define mmCP_HQD_PQ_BASE … macro
Dgc_9_2_1_offset.h3019 #define mmCP_HQD_PQ_BASE … macro
Dgc_10_1_0_offset.h5319 #define mmCP_HQD_PQ_BASE … macro
Dgc_10_3_0_offset.h4952 #define mmCP_HQD_PQ_BASE … macro