Searched refs:mmCP_HQD_IB_CONTROL (Results 1 – 13 of 13) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_7_2_d.h | 601 #define mmCP_HQD_IB_CONTROL 0x325a macro
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| D | gfx_7_0_d.h | 588 #define mmCP_HQD_IB_CONTROL 0x325a macro
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| D | gfx_8_0_d.h | 651 #define mmCP_HQD_IB_CONTROL 0x325a macro
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| D | gfx_8_1_d.h | 651 #define mmCP_HQD_IB_CONTROL 0x325a macro
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_0.c | 259 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_CONTROL),
3587 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_IB_CONTROL); in gfx_v9_0_mqd_init()
3746 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_IB_CONTROL, 0); in gfx_v9_0_kiq_fini_register()
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| D | gfx_v7_0.c | 2913 mqd->cp_hqd_ib_control = RREG32(mmCP_HQD_IB_CONTROL); in gfx_v7_0_mqd_init()
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| D | gfx_v10_0.c | 401 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_CONTROL),
6872 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_IB_CONTROL); in gfx_v10_0_compute_mqd_init()
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| D | gfx_v8_0.c | 4514 tmp = RREG32(mmCP_HQD_IB_CONTROL); in gfx_v8_0_mqd_init()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 2859 #define mmCP_HQD_IB_CONTROL … macro
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| D | gc_9_1_offset.h | 3087 #define mmCP_HQD_IB_CONTROL … macro
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| D | gc_9_2_1_offset.h | 3043 #define mmCP_HQD_IB_CONTROL … macro
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| D | gc_10_1_0_offset.h | 5343 #define mmCP_HQD_IB_CONTROL … macro
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| D | gc_10_3_0_offset.h | 4976 #define mmCP_HQD_IB_CONTROL … macro
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